Srini Chinamilli, our Co-founder and CEO, shares his vision for India's journey to becoming a global semiconductor hub within the next decade in an exclusive interview with ET Edge. He...
Our CEO and Co-Founder, Srini Chinamilli, shares his expert insights in a recent DataQuest interview, discussing the growing impact of specialized AI chips on industries such as healthcare, automotive, and...
The article on the vital role of PCB designers in shaping modern electronics, authored by Sudhir Wokhlu, Vice President - HW Division at Tessolve, has been published in Machinist Magazine....
In an exclusive interview with TechGig, Tessolve’s Co-Founder and CEO, Srini Chinamilli, shared valuable insights into the future of the semiconductor and AI chip industries, emphasizing the importance of specialized...
Tessolve proudly celebrates its PCB Design Team for winning the prestigious Siemens Xcelerator Technology Innovation Award in the Best Overall Design category. This recognition highlights their dedication, innovation, and exceptional...
Tessolve has been recognized in the 2024 Semiconductor Engineering Services PEAK Matrix® Assessment by Everest Group, securing a top position within the Major Contenders bracket in our first appearance. This...
We’re excited to announce that Tessolve is acquiring Germany’s Dream Chip Technologies! This move strengthens our expertise in advanced chip design across AI, automotive, and data center markets while expanding...
We are excited to welcome Girish Wagle as Tessolve's new Senior Vice President of Embedded Sales and Business Development. With over 25 years of experience across industries like Telecom, Automotive,...
Tessolve, a global leader in engineering services and solutions with over 3000 employees, has once again earned the prestigious “Great Place to Work” certification by Great Place to Work, India....
Tessolve’s Co-founder & CEO, Srini Chinamilli, shares his insights with People Matters, highlighting the crucial role of hard work, ambition, and continuous learning in driving entrepreneurial success. In the article, he discusses how...
Our CEO, Srini Chinamilli, shared insights on Tessolve’s advancements in AI chip development and our contributions to India’s semiconductor ecosystem in Digit’s feature. The article highlights our end-to-end chip design...
Tessolve is proud to announce that we have received the esteemed FS ISO 26262 certification, awarded by TÜV SÜD. This recognition underscores our unwavering commitment to quality and safety in...
Tessolve has inaugurated a new office in Hubli, Karnataka, marking our third expansion in the region. We extend our gratitude to everyone who supported us and thank Sri Sharath Kumar...
In this exclusive interview with BISInfotech, Tessolve’s CFO, Raghavendra Jha, shares insights into the company's impressive growth, strategic investments, and commitment to engineering excellence. Learn how Tessolve reached the ₹1000...
We are excited to announce a strategic collaboration with SigmaSense to develop an innovative DSP-based sensing ASIC. This advanced mixed signal ASIC features a low-power touch-sense controller chip integrated with...
We are thrilled to highlight insights from our CFO, Raghavendra Jha, featured in CFO India’s article, "Mapping the Path of Innovation." In this article, Raghavendra emphasizes the strategic focus needed...
Tessolve is excited to announce surpassing ₹1000 Crore in revenue, a testament to our team's dedication and the trust of our valued customers and partners. We look forward to continued...
Economics Times recently highlighted Tessolve's significant contributions to addressing the talent shortage in the semiconductor industry. We're proud to lead initiatives such as conducting specialized workshops, expanding campus hiring, and...
Tessolve, a Bengaluru-based chip design and testing company, achieved double-digit growth in 2023 despite a 10% industry decline, driven by a 25% CAGR over the past five years and increasing...
Srini Chinamilli, Co-founder & CEO of Tessolve, recently discussed the company's strategic initiatives with ET Telecom. He highlighted Tessolve's commitment to accelerating plans in India through collaborative discussions with leading...
Tessolve, a global leader in silicon and systems solutions, has unveiled a SMARC system-on-module (SOM) featuring the Renesas RZ/V2H MPU, tailored for the industrial, robotics, and transportation markets. This collaboration...
In a recent interview with CIOL, our Co-founder & CEO, Srini Chinamilli, highlighted the pivotal role of semiconductors in shaping tomorrow's tech landscape. he emphasized how semiconductors are fueling innovative...
Tessolve's Co-founder and CEO, Srini Chinamilli, recently participated in an insightful interview featured on BISINFOTECH, alongside other esteemed industry experts. Delving into the critical domains of semiconductor testing and research...
Dr. Veerappan VV, the esteemed Co-founder and President of Tessolve, is stepping into the prestigious role of Chairman at the India Electronics and Semiconductor Association (IESA). This transition marks a...
Tessolve, in collaboration with NXP Semiconductors, has announced the advancement of a mass-market digital connected cluster reference design, leveraging NXP's i.MX RT1170 crossover MCU and other key components. This collaboration...
Tessolve's CEO, Srini Chinamilli, recently shared invaluable insights with CXOToday, shedding light on Tessolve's journey amidst challenges and opportunities in the semiconductor industry. From design to manufacturing, Chinamilli discusses the...
Tessolve announces a strategic collaboration with Keysight Technologies to enhance testing capabilities at its newly established HSIO Lab in Bangalore, India. By leveraging Keysight's innovative test solutions and expertise, Tessolve...
Tessolve, the leading provider of semiconductor engineering solution, joyously commemorates two decades of groundbreaking innovation and unwavering excellence. Over the past 20 years, Tessolve has consistently pushed the boundaries of...
Tessolve is a leading global engineering service and solution provider, a team of over 3000 skilled professionals is thrilled to announce its recent certification as a "Great Place to Work." ...
Tessolve is proud to announce its strategic collaboration with Airbiquity, a leading provider of connected vehicle services. This partnership heralds a new era of connected vehicles with Telematics Gateways, Over-The-Air...
We are very glad to share that our co-founder and CEO, Mr. Srini, has been honored with the prestigious Business Excellence Award by Telugu Times in California. This well-deserved recognition...
We were excited to participate in the ITC Conference 2023, held on July 23–25, 2023, in Bengaluru, India. International Test Conference India 2023 has been a platform of innovation, collaboration,...
Tessolve team was excited to participate in the Semicon India event, which was held on 28th to 30th July 2023, in Gandhinagar, Gujarat, India. We had the privilege of connecting...
Tessolve, a leading global provider of semiconductor engineering solutions, announced today it has joined Intel Foundry Services (IFS) Accelerator Design Services Alliance to enhance post-silicon validation for complex digital, analog,...
Tessolve, a worldwide provider of engineering solutions spanning complex chip design, semiconductor hardware and software development, testing, failure analysis, and embedded systems development is happy to announce that the Verification Futures...
Tessolve is a leading semiconductor design services organization that offers comprehensive solutions to its clients, encompassing silicon and silicon platform realization. Tessolve is the world's largest standalone design services provider...
Tessolve, a global provider of engineering solutions, has announced its partnership with the TSMC Design Center Alliance (DCA) program, part of the TSMC Open Innovation Platform® (OIP). This collaboration will...
We are thrilled to share another milestone in Tessolve’s journey. For the 1st time, Tessolve has clocked annual revenue of $100M. Despite the ongoing challenge in Semiconductor industry, Tessolve’s growth...
The Tessolve Vizag team is expanding and is now relocating to a larger facility to accommodate upcoming testing needs. We are glad to announce the inauguration of our Tessolve-Vizag office...
The Tessolve presence keeps expanding, and we are pleased to announce the inauguration of our Tessolve-Hubballi office on February 10, 2023, at Hubballi, Karnataka. Here is the Press Release from...
Here is the note from our CEO Srini Chinamilli about the inauguration,- “I am happy to announce that our Austin Semiconductor Test Lab is officially inaugurated. We are looking forward...
Tessolve is working to enable its first RISC-V based SOC reference design in early 2023, using Intel Pathfinder for RISC-V as the preferred development environment. Tessolve and Intel will implement...
Tessolve is proud to announce the successful commissioning of a fully equipped 5th test engineering lab in the heart of Texas at Austin. This is another landmark step to continue...
We are glad to announce the release of the September 22 edition of our Newsletter, First Bin. The newsletter contains a note from our CEO’s Desk, Tessolve Showcase article, and...
Among IoT device customers such as organizations, educational institutions and government agencies, there is a lack of industry measures to help to mitigate cybersecurity risks. Read More Find out how...
A penetration test tells whether the existing defensive measures employed on the system are strong enough to prevent any security break. Read More Understand how T&VS Automotive services help you...
We are happy to announce part 3 of the IESA Annual Member Meet webinar series, in which Tessolve CEO Mr. P Raja Manickam, will be addressing the opportunities and the...
Hero Electronix, the parent company of Tessolve, launched another brand under its umbrella last week. The new brand – Qubo – will launch a series of AI-powered intelligent home appliances,…
Using the SMARC standard 2.0 for embedded modules, Tessolve Embedded Systems introduces ultra-low power ARM COMs (Computer-On-Module) based on the Qualcomm SnapdragonSD820 Family which is powered by 64-bit ARMv8-compliant quad-core...
Tessolve strengthened its work in the field of Near Field Communication (NFC) based on hybrid technology work as the industry transitioned into the new technological world by adding automation process...
Tessolve kicks off the multi-city, multi-country demonstration of its TERA device, a key next Generation NXP technology (S32G274A based SMARC SoM) based on state-of-the-art Application Gateway at NXP Technology Days...
Tessolve, a leading semiconductor engineering service partner, was an integral part of the ITC Test Week India 2022, at Radisson Blue Hotel, Bengaluru between July 24-26. The booth highlighted the...
Tessolve participated at the SemiconIndia 2022, the post-COVID gigantic conference in the Semiconductor industry. The Hon’ble Prime Minister of India, Shri Narendra Modi, inaugurated the conference via Video Conference on...
Tessolve, a Hero Electronix venture and an end-to-end engineering solution partner for semiconductor and system companies, is pleased to announce the appointment of two industry veterans, Huzefa Cutlerywala as Senior...
The verification of processor architectures designed for Machine Learning (ML) applications represent a departure from conventional techniques. Conventional constrained random testbenches, which focus on stimulus driving coverage, cannot scale for many ML algorithm realizations. ML architectures involve neural networks of processors that “learn” by manipulating coefficients across the network to match ideal outputs to a large quantity of input data. Furthermore, smart compiler technology is employed to leverage the many paths available in the network. An effective verification strategy can leverage planning algorithms that start with the desired output and optimize input values to achieve that output. Ensuring the paths that the compiler might trigger have all been tested, and that the test content can scale from individual processors to the entire network are critical challenges. Breker will share various approaches to this problem, developed through cooperation with three noted AI processor providers.
3 Key Points:
Current verification methodologies cannot scale to meet ML processor challenges
ML verification approach: consider desired outputs, optimize inputs to match
Test Suite Synthesis enable planning algorithm approach to target ML requirements
An Emulation Strategy for Artificial Intelligence Designs
The emergence of Artificial Intelligence is the “next big thing” and presents a unique opportunity for disruptive semiconductor development. End applications could range from ADAS, to 3D facial recognition, to voice and image processing, or to intelligent search. The SoCs for AI applications whether targeted for training or inference will have their own unique characteristics, but present quite common verification challenges that we will present in this session.
Supporting designs as big as 15 billion gates, Mentor’s Veloce Strato has unique virtualization capabilities that enable highly accurate pre-silicon execution of AI benchmarking applications like MLPerf. The Veloce Power App enables analysis of peak and average. We will cover how Veloce Strato and its supporting solutions are the best tool to help address the verification challenges of SoCs targeted for AI applications.
Most AI chips and hardware accelerators that power machine learning (ML) and deep learning (DL) applications include floating-point units (FPUs). Algorithms used in neural networks are often based on operations that use multiplication and addition of floating-point values. FPUs are difficult to implement. The IEEE 754 standard defines many corner-case scenarios and non-ordinary values. Even a minor rounding mistake could accumulate over many iterations and produce a large error. An FPU formal verification app compliant with IEEE-754 provides an efficient and rigorous solutions to FPU functional verification
3 Key Points:
Floating-point unit (FPU) for AI chips
FPU Formal Verification App
Compliance with IEEE-754
Name: Mike Bartley
Designation: Senior Vice President – VLSI Design
Title: Introduction
Biography:
Mike Bartley has a PhD in Mathematics from Bristol University, an MSc in Software Engineering, an MBA from the Open University and over 25 years of experience in software testing and hardware verification. He has built and managed state-of-the-art test and verification teams in a number of companies who still use the methodologies he established. Since founding TVS in 2008 he has grown the company to over 100 employees worldwide. Dr Bartley is Chair of both the Bristol branch of the British Computer Society and the West of England Bristol Local Enterprise Partnership (LEP). He has had over 50 articles and presentations published on the subjects of hardware verification, software testing and outsourcing.