Mike Bartley (Tessolve Semiconductor Ltd)

This short introduction to digital Design Verification (DV) explains the importance of DV in both IP and chip development. It introduces the main state-of-the-art DV strategies before outlining the potential impact of AI/ML techniques on future DV strategies.

Key Points:

• Introduction to digital Design Verification (DV) and it’s importance of DV in both IP and chip development.
• Main state-of-the-art DV strategies
• Outline the potential impact of AI/ML techniques on future DV strategies.

Dr Mike Bartley has over 30 years of experience in software testing and hardware verification. He has built and managed state-of-the-art test and verification teams inside several companies (including STMicroelectronics, Infineon, Panasonic, and the start-up ClearSpeed) and also advised several companies on organisational verification strategies (ARM, NXP, and multiple start-ups). He has been working on the application of artificial intelligence (AI) since using genetic algorithms in 1998 and now helps companies to adopt best practice AI in DV to improve the productivity and quality of their verification.

Mike successfully founded and grew a software test and hardware verification services company to 450+ engineers globally, delivering services and solutions to over 50+ clients in various technologies and industries. The company was acquired by Tessolve Semiconductors where he is now Senior VP driving sales in Europe, global DV strategies, and R&D into adoption of AI and best practice. Tessolve is a a global company with 3000+ employees supporting clients in VLSI, silicon test and qualification, PCB, and embedded product development in multiple vertical industries.