Copyrights © Tessolve Semiconductor Pvt. Ltd. All rights reserved.
Design by Webindia
Welcome to Tessolve News & Events. Here you’ll find information on Tessolve including recent announcements, upcoming events, press release etc., we invite you to take a few minutes to browse the site to learn more about what’s latest at Tessolve.
KANGAR March 27 - A semiconductor Design and Test Engineering company based in Bangalore, India, and it's Malaysian entity Tessolve Semiconductor Sdn. Bhd. (TSM) aims to produce and deploy about 200 Test Engineers in the field, with the opening of a Training Center at Chuping Valley Industrial Estate (CVIA), Padang Besar near here soon.
The opening of the Training Center for the training of skilled engineers in semiconductor testing involving RM16 million is done through a memorandum of agreement (MoA) between the company and the Northern Corridor Implementation Authority (NCIA) at the State Legislative Assembly Complex (DUN) here today.
The agreement was signed between P Raja Manickam (CEO) representing TSM and Datuk Redza Rafiq Abdul Razak (CEO) from NCIA, witnessed by Chief Minister of the Perlis State, Datuk Seri Azlan Man.
In a statement issued by the NCIA, through the MoA, the agency aims to create an expert ecosystem development of test engineers in the field of semiconductor for the northern part of the country.
The statement said, it was to make electrical and electronics related companies in the country highly competitive.
Datuk Seri Azlan, in his press conference, said 1.2 hectares of land at CVIA were identified for the development of the center which is expected to produce and deploy 40 skilled resources to the field every one year for the next 5 years.
Training conducted by Tessolve Semiconductor, a leading Engineering Service company has been proven when they have trained and deployed as many as 2,700 graduates in India for the field.
As expected by the American Chamber of Commerce (AMCHAM), we need a total of 200 tester engineers in the semiconductor field a year.
"Currently, the country brings in highly skilled and experienced test engineers from India (being predominant) as well as other countries with a salary of RM15,000 per month and it costs RM50,000 if we want to train our engineers overseas for three weeks," he said.
Meanwhile, at the same event, the Letter of Acceptance was given to University Malaysia Perlis (UniMap) to conduct and provide market research for electrical motorcycles (E2W).- UTUSAN ONLINE
Tessolve designs and manufactures the new flagship ADAS product of Coyote Systems A one-stop-shop solutions provider improves time to commercialization and outstanding cost effectiveness for next generation automotive connected devices
Mr Raja Manickam, CEO of Tessolve was bestowed the Technovation Sarabhai Award for the year 2017, at the annual flagship event of India Electronics & Semiconductor Association (IESA) at Bengaluru, India, on Feb 27, 2018.
The IESA Vision Summit is a major platform in India where business leaders, strategists, policy makers and technology experts meet and explore the trends, challenges, and opportunities shaping the Indian semiconductor & electronics industry today.
Technovation Sarabhai award is a prestigious award, for outstanding contributions by an individual to Indian semiconductor or electronics industry, and it is a proud moment for Tessolve in Raja receiving this special one now and becoming one among the privileged previous awardees.
Tessolve is NI STS Specialty Partner for worldwide applications support and solutions development. Tessolve has established two STS Test Systems in the Test floor to support engineering development 24/7, supported by well-trained team of 20 engineers.
We provided a sneak peek into some of test solutions developed by Tessolve on the NI-STS system. We offered an experience to several challenges faced and case studies of test engineering solutions done by Tessolve for a variety of semiconductor ICs.
20th May 2017 to 28th May 2017
Tessolve has come up with a series of ultra-low power System-On-Module based on the NXP i.MX family which is powered by ARM Cortex A9 CPUs in 2014.
Tessolve Embedded system introduces a series of ultra-low power ARM System-On-Module based on the NXP i.MX family which is powered by ARM Cortex A9 CPUs.
India Electronics & Semiconductor Association has scheduled its annual flagship event IESA Vision Summit 2017 on Feb 21 & 22, 2017 at Hotel Leela Palace, Bangalore. The theme of the event is “Design led Manufacturing – Redifining the future of India’s ESDM”
Tessolve Semiconductor is the Platinum sponsor for this event. Mr. Ujjwal Munjal, Founder Director of Hero Electronix & Mr.P.Rajamanickam, Founder & CEO of Tessolve are among the key speakers.
Highlights of Vision Summit 2017
• Over 50 speakers
• Makeathon on AR & VR
• Makeathon on Industrial IoT
• Technovation Awards
• Makeathon Awards
• Representation by policy makers: both states and Central and country delegations
• 900+ Delegates from Semiconductor cos., Start-ups, Electronics Manufacturing, System Integrators etc.
• CEO meet & Greet
• 50 ESDM start-ups Showcasing products
• Exclusive event coverage by media and Social media
Opening of NI Lab
Lecture on “Beyond Moore’s Law"
Tessolve inaugurated its new branch office at Vizag on 6th May 2015 with an engineering team size of 12 members. The engineering activity will focus on PCB design and Packaging design initially. The team size will ramp up with more projects in the coming quarters for PCB, packaging and software engineering team activities.
FETNA conference where Raja received an award for his contribution to entrepreneurship at the Tamil Entrepreneurship Forum on July 3,2015
Chennai, June 30, 2015: Kalasalingam University (KLU) in Tamilnadu is to offer an advanced M. Tech. programme in VLSI design, test and manufacturing in association with Bengaluru-based Tessolve Semiconductor.
The curriculum for the course has been designed by Tessolve in consultation with KLU, anticipating the current and future industry trends. A memorandum of understanding for offering the course was signed on Monday by university Chancellor K. Sridharan and Srinivas Chinamilli, Co-founder and President of Tessolve Semiconductor.
News video about the launch event can be accessed here.
An M.Tech degree programme that assures a paid internship and a valuable career at TESSOLVE.
The Kalasalingam University (KLU) in partnership with Tessolve Semiconductor Bangalore, offers a unique M.Tech programme in VLSI Design, Test and Manufacturing. For more details, please refer the course brochure here. To Apply for this M.Tech programme on KLU website Admissions page, click here. To go to KLU main website click here.
March 2015: Silicon India (www.siliconindia.com) has selected Tessolve Semiconductor (www.tessolve.com) in its 20 Most Promising Semiconductor Solution Providers. The positioning is based on Tessolve’s engineering expertise in the areas of Semiconductor Design, Test/Product Engineering, PCB Design, Failure Analysis and Systems design.
To read the Article click here.
To read the Press Release click here.
November 5, 2009, Tessolve Semiconductor Pvt. Ltd. today was named a recipient of SiPort Corporation’s Supplier Appreciation award for outstanding and dedicated support which enabled SiPort to become the #1 HD radio silicon company.
Semi indicating Tessolve article on SEMI Semiconductor Manufacturing magazine
MOUNTAIN VIEW, Calif., Aug. 28 /PR Newswire-FirstCall/ --Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Tessolve has adopted Synopsys' DFT MAX scan compression solution to reduce the costs of semiconductor testing and diagnostics
MOUNTAIN VIEW, Calif., Aug. 28 /PR Newswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Tessolve has adopted Synopsys' DFT MAX scan compression solution to reduce the costs of semiconductor testing and diagnostics. DFT MAX automates creation of scan compression circuits on-chip that…
Tessolve Semiconductor specializes in providing world class and cost effective solutions for test development, failure analysis, and reliability test for …
Very glad to share that following three papers which got selected were presented by our team member at the TUG (Teradyne User Group) CONFERENCE CHINA, last week. The papers were well received and appreciated by everyone. We are also very happy to share that Vijay Anand's paper won the Best Paper award in the DIB DESIGN category.
1) Adaptive RF-DIB for ATE and Bench Reducing NRE-cost and Cycle Time, in RF / Wireless category, by
2) Novel DIB Layout Solution to Minimize Load Capacitance in pico-Amps Measurement, in DIB Design category, by
3) Choosing the right PCB Stackup technology for your Teradyne Ultraflex Test Boards, in DIB Design category, by
Tessolve Semiconductor Malaysia (TSM) participated in this event which was organized by Semi Singapore from 25th April 2017 to 27th April 2017. Participants from several Asian countries took part in this event ranging from various Engineering fields.
TSM booth was set up with our Engineering services portfolio as well as our newly acquired PCB Fabrication plant with PCB boards displayed during the 3-day exhibition. We had several enquiries expressing interest in our Product portfolio as well as our design capabilities in PCB Fabrication. There were several card exchanges and interactions between our Technical staff who were stationed during the 3-day duration as well as potential customers.
The annual flagship event of India Electronics & Semiconductor Association (IESA) at Bengaluru, India was held on on Feb 02-03, 2015. The IESA Vision Summit provides an ideal platform for business leaders, strategists, policy makers and technology experts to explore the trends, challenges, and opportunities shaping the Indian semiconductor & electronics industry today.
Mr Rajamanickam and Mr Srinivas Chinamilli were among the distinguished speakers in the panel discussion: “Fuelling the Wheels of Change - the essentials”, during the event, that discuss the role played by key sectors in fuelling the wheels of change set in motion by various favourable factors in the country and transforming India into a self-reliant global hub for electronics and semiconductors.
Tessolve participated in the Deftronics expo at BIEC Bangalore on 23rd and 24th September 2014 showcasing the breadth and depth of services offered by the company to a wide range of prospective customers in the Defense industry.
In April 2014, Mr Karthik Chellappa, Test Lead, successfully presented a paper on “Test Optimization for Dual RX RF Transceiver” at the Teradyne Users Group Conference, TUG2014, at Anaheim, CA, USA. Abstract can be seen here.
On 11th Sep. 2013, Mr D Rajakumar, Director – Test Engineering-Tessolve presented a paper at ITC-2013 about "Lower-Cost Test Solution for CMOS Image Sensor Wafer Sort". It was presented under ADVANCED INDUSTRIAL PRACTICES SESSION-4 (AIP 4), which was conducted in the category of LOW COST TEST WITH HIGH END TESTERS. The TOC of the proceedings is available here.
PCB Technology Day 2012 was organized by Mentor Graphics at Hyderabad(15th May 2012) & Bangalore(17th May 2012). Tessolve Semiconductor participated in this event being as authorized distributor to Sale & Support Mentor products in India. Participation from more than hundreds of people from Defence, Space labs, PSU & Industries made this event a grant success.