+91 80 4181 2626
IC Design Engineering - Services


  • SPEC-to-RTL Implementation
  • Logic Synthesis and Logic Equivalence Checking (LEC)
  • Design Verification (DV)
  • Emulation
  • Design For Test (DFT)
  • Static Timing Analysis (STA)
  • Physical Design (PD)
  • Electrical Analysis and Packaging
  • IP Development
  • Library Development – IO, Memory and Standard Cell development
  • Analog and Mixed-Signal Design and Verification

Pre-Silicon Validation is usually performed with customer specified FPGA platforms to minimize the cost and speed up the validation effort. Design Engineering team of Tessolve has rich experience in developing RTL for handling RTL porting onto various platforms including Xilinx / Altera based FPGA Development Kits and validating the IP Solutions with optimal timing closure. Coupled with Experienced System Design Resources, this adds unique value to the services offered in the arena of Pre-Silicon Design Services.

IC Design Engineering

Quick Links