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PCB Design Engineering - ATE Board Design Services

ATE Board Design Services

Tessolve is a leading supplier of ATE (Automatic Test Equipment) Board design solutions and services and our customer base in this business sector includes several of the world’s leading semiconductor companies and serves as testimony to its success and commitment to customer satisfaction in this area. Our design team has in depth knowledge and more than ten years’ experience on all popular ATE Test Platforms, designing loadboards, probecards and associated test fixtures. In addition to ATE board design, our value added services like fabrication, assembly and Test have helped clients with cost effective implementation and quick turnaround time.

ATE Test Board Design Services

Design Showcase-ATE Test Boards

  • 0.4mm pitch, 990 pins DUT.
  • 40 layers Flip drill stackup for 0.185” thick PCB.
  • 6000 parts.
  • 14 Signal and 5 Power layers with GND layers on both sides.
  • Mixed signal processor with HDMI, MIPI, USB High speed Digital and TXDAC, BBRX and WLAN Analog Interfaces.
  • Critical signal's via stubs were back-drilled.
  • 12A supplied for each DUT Core power. PDN analysis performed to verify the power planes layout.
  • Symmetrical placement and DUT breakout across 12 sites.
  • Verigy 93K Full-Size.
  • Quad Site DUT 7 x 9 mm 252 Pins, 0.5mm pitch FCCSP.
  • 26 layers with blind vias used.
  • Operating Frequency - 5Gbps.
  • 50ohm +/-10% & 100ohm for Differential pair.
  • 90ohm for USB_DP / DN and USB_Rx / Tx lines.
  • Board Material -  FR4 High-Tg.
  • Board thickness -  0.180" +/- 10%.
  • High speed signals were routed in microstrip with good shielding and arc routing.
  • Symmetrical placement across all 4sites.
  • Critical signal’s via stubs were back-drilled.
  • 4225 pin DUT, 8 site
  • Vertical contact probe card
  • 0.8mm pitch
  • 40 layers, 18signals, 7powers
  • 250mil board thickness
  • Controlled impedance
  • Length matching for IO signals
  • Via filling for DUT pins
  • 32 pin LQFP, mixed signal
  • 0.8mm pitch
  • Octal sites
  • 6 HSD200 instrument
  • DC75,DC90,POOL ,HVD instruments are used
  • 32 layers
  • 200 MHz
  • 5.08mm board thickness
  • Controlled impedance
  • VHFAC,POOL,HSD,DC30, DC75 instruments are used
  • POOL signals are routed with shielding
  • 5.08mm board thickness
  • 28 layers
  • Controlled impedance
  • 0.2mm pitch
  • 6 sites - WLCSP
  • 2 HSD Instrument – 512 channels
  • UVI 80,UVS 256, ULTRA PAC & SUPPORT Instruments were used
  • 48 layers & 20 layers in Book1
  • 8 type blind via, 4 type buried via & 3 sequential lamination
  • 24 Through hole RF ports
  • 6.09mm board thickness
  • 635 pins, 0.8mm pitch
  • DUAL site
  • Vertical contact probe card
  • 250mil board thickness
  • 32 layers
  • Controlled impedance
  • Length matching from loopback signals
  • Arc routing
  • Via filling for DUT pins
  • 30 pin SOIC, mixed signal device
  • 1.27mm pitch
  • 32 sites
  • 1024 channels - full size board
  • 38 layers
  • 6mm board thickness
  • Length match routing for all signals
  • 50 pin device
  • FR4 with 1oz copper
  • Cantilever probe card
  • 32 sites
  • 24 layers
  • 250mil board thickness
  • Impedance controlled
  • Hard gold plating for Pogo pins
  • APU12, SPU100, QMS, TMU and Digital instruments are used
  • 187mil board thickness
  • 26 layers
  • Controlled impedance
  • Designed with 1638 components and 5747 connections
  • Hard gold plating for pogo tower and tester pins
  • 8 pin SOIC
  • 140 Sites
  • 840 signals
  • 140 pwrs
  • 26 layers
  • 6.35mm board thickness
  • Controlled impedance
  • Length match routing for all signals
  • Vertical probe card
  • 480 Die
  • 1.1mm Pitch
  • 3274 Signals
  • 4122 Shared signals
  • 480 DUT to Relay power and 240 Relay to TC power segmentations in 16 layers.
  • 240 control bits in 3 layers
  • 52 layers
  • 6.35 mm board thickness
  • Controlled impedance
  • Length match routing for all signals
  • EVM Board is mainly used for characterization of IC after packaging.
  • 289 Pin BGA mixed signal device.
  • The design has 32 analog input, LVDS Output & SERDES output with a LMK Clock circuit.
  • All input/output channels got matched with length.
  • It has 60 output differential Paris which got matched with tight tolerance.

ATE Platforms-Test Board Templates

We have ATE Test Board Templates (LB, PC, and PIB) for various models of Testers from leading Test Vendors.

Board Design Experience

PCB Design Engineering

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